[llvm] 7a7146c - [X86] When creating X86ISD::MGATHER nodes from AVX2 gather intrinsics, cast the mask to integer type.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 23 23:26:18 PST 2020
Author: Craig Topper
Date: 2020-02-23T23:00:41-08:00
New Revision: 7a7146cf72ad46f706e892f32f64405665f31ba3
URL: https://github.com/llvm/llvm-project/commit/7a7146cf72ad46f706e892f32f64405665f31ba3
DIFF: https://github.com/llvm/llvm-project/commit/7a7146cf72ad46f706e892f32f64405665f31ba3.diff
LOG: [X86] When creating X86ISD::MGATHER nodes from AVX2 gather intrinsics, cast the mask to integer type.
The gather intrinsics use a floating point mask when the result
type is FP. But we call DemandedBits on the mask assuming its an
integer type. We also use integer types when we create it from
generic IR. So add a bitcast to the intrinsic path to guarantee
the integer type.
Added:
Modified:
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index f3e73e6968f8..3c99423fa637 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -5444,6 +5444,8 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
else if (IndexVT == MVT::v8i64 && NumElts == 8 && EltSize == 64)
Opc = IsFP ? X86::VGATHERQPDZrm : X86::VPGATHERQQZrm;
} else {
+ assert(EVT(MaskVT) == EVT(ValueVT).changeVectorElementTypeToInteger() &&
+ "Unexpected mask VT!");
if (IndexVT == MVT::v4i32 && NumElts == 4 && EltSize == 32)
Opc = IsFP ? X86::VGATHERDPSrm : X86::VPGATHERDDrm;
else if (IndexVT == MVT::v8i32 && NumElts == 8 && EltSize == 32)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 64dcb754f89a..859bc97b6210 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -24760,6 +24760,9 @@ static SDValue getAVX2GatherNode(unsigned Opc, SDValue Op, SelectionDAG &DAG,
if (Src.isUndef() || ISD::isBuildVectorAllOnes(Mask.getNode()))
Src = getZeroVector(Op.getSimpleValueType(), Subtarget, DAG, dl);
+ // Cast mask to an integer type.
+ Mask = DAG.getBitcast(MaskVT, Mask);
+
MemIntrinsicSDNode *MemIntr = cast<MemIntrinsicSDNode>(Op);
SDValue Ops[] = {Chain, Src, Mask, Base, Index, Scale };
More information about the llvm-commits
mailing list