[PATCH] D72713: [ARM][LowOverheadLoops] Check loop liveouts

[Sam Parker via Phabricator via llvm-commits]

samparker updated this revision to Diff 245144.
samparker added a comment.

Rewritten so that we check all the live-out regs during tail predication validation. I've added a couple of extra tests too to check that we allow predicated liveout instructions as well as having live out regs that aren't defined by instructions within the loop body.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72713/new/

https://reviews.llvm.org/D72713

Files:
  llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/extract-element.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/livereg-no-loop-def.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/matrix.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/multiple-do-loops.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-vpsel-liveout.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/predicated-liveout.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-add-operand-liveout.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp16-reduce.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-liveout-lsr-shift.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-opcode-liveout.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-operand-liveout.mir

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