[PATCH] D74141: [InstCombine] Simplify a umul overflow check to a != 0 && b != 0.

[Florian Hahn via Phabricator via llvm-commits]

fhahn updated this revision to Diff 244647.
fhahn marked 5 inline comments as done.
fhahn added a comment.

Address comments, thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74141/new/

https://reviews.llvm.org/D74141

Files:
  llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
  llvm/test/Transforms/InstCombine/umul-signed.ll

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