[PATCH] D74390: [ARM] VMLAVA reduction patterns
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 12 02:42:45 PST 2020
dmgreen added inline comments.
================
Comment at: llvm/lib/Target/ARM/ARMInstrMVE.td:974
+
+ def : Pat<(i32 (add (i32 (vecreduce_add (mul (v4i32 MQPR:$src1), (v4i32 MQPR:$src2)))), (i32 tGPR:$src3))),
+ (i32 (MVE_VMLADAVau32 $src3, $src1, $src2))>;
----------------
samparker wrote:
> why does this pattern use a tGPR but the rest are GPR?
Good eyes. I've changed them to tGPREven/tGPROdd, like the instruction definition.
The 16/8 below is also wrong. Apparently my testing script wasn't really testing what it should have.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D74390/new/
https://reviews.llvm.org/D74390
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