[PATCH] D72683: [PowerPC] set instruction number as 1st priority for lsr cost model

Mon Feb 10 19:19:23 PST 2020

shchenz marked 2 inline comments as done.
shchenz added inline comments.

================
Comment at: llvm/test/CodeGen/PowerPC/unal-altivec.ll:36
+; CHECK-DAG: lvsl [[MASK1:[0-9]+]], [[B1:[0-9]+]], [[C0]]
+; CHECK-DAG: add [[B3:[0-9]+]], [[B1]], [[C0]]
+; CHECK-DAG: lvx [[LD1:[0-9]+]], [[B1]], [[C0]]
----------------
steven.zhang wrote:
> The "add" here is new added ? Does it mean that, for this case, it produces bad code ?
Thanks for reviewing this.
Yes, for this case, the inst number inside the loop becomes larger. I plan to look into it later.
For big applications, I get the perf data for cpu spec2017, we get a positive result.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72683/new/

https://reviews.llvm.org/D72683