[PATCH] D74075: [mlir][VectorOps] Introduce a `vector.fma` op that works on n-D vectors and lowers to `llvm.intrin.fmuladd`

[Nicolas Vasilache via Phabricator via llvm-commits]

nicolasvasilache marked an inline comment as done.
nicolasvasilache added inline comments.


================
Comment at: mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir:614
+
+// CHECK-LABEL: llvm.func @vector_fma
+func @vector_fma(%a: vector<8xf32>, %b: vector<2x4xf32>)
----------------
aartbik wrote:
> nicolasvasilache wrote:
> > aartbik wrote:
> > > note that something like
> > > 
> > > // CHECK-SAME: %[[A:arg[0-9]+]]: 
> > > 
> > > can be used if you want to match the argument inputs as well, see e.g.  insert_strided_slice3 (probably need to rename a/b into arg0/arg1 to be sure, although I think that renaming happens anyway)
> > I do not see this as necessary, there is a 1-1 mapping that is already captured by the type.
> It was of course just a suggestion :-)
> 
> Regardless, I find %[[arg0]] easier to parse by eye than  {{.*}} and it is the direction we are generally taking with new tests. But I won't insist.
ok, I am sensitive to general simplicity, maybe erring on the side of terseness is counter-productive, I'll just update it :)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74075/new/

https://reviews.llvm.org/D74075