[llvm] 3b19851 - GlobalISel: Fix narrowing of G_CTPOP
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 7 07:08:49 PST 2020
Author: Matt Arsenault
Date: 2020-02-07T06:58:00-08:00
New Revision: 3b198518ad540f789f45490e896565d4f0862c16
URL: https://github.com/llvm/llvm-project/commit/3b198518ad540f789f45490e896565d4f0862c16
DIFF: https://github.com/llvm/llvm-project/commit/3b198518ad540f789f45490e896565d4f0862c16.diff
LOG: GlobalISel: Fix narrowing of G_CTPOP
The result type is separate from the source type. Tests will be
included in a future AMDGPU patch which uses this from
RegBankSelect/applyMappingImpl.
Added:
Modified:
llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 88da57bfb591..153d42c4e368 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -4040,16 +4040,17 @@ LegalizerHelper::narrowScalarCTPOP(MachineInstr &MI, unsigned TypeIdx,
if (TypeIdx != 1)
return UnableToLegalize;
+ Register DstReg = MI.getOperand(0).getReg();
+ LLT DstTy = MRI.getType(DstReg);
LLT SrcTy = MRI.getType(MI.getOperand(1).getReg());
unsigned NarrowSize = NarrowTy.getSizeInBits();
if (SrcTy.isScalar() && SrcTy.getSizeInBits() == 2 * NarrowSize) {
auto UnmergeSrc = MIRBuilder.buildUnmerge(NarrowTy, MI.getOperand(1));
- auto LoCTPOP = MIRBuilder.buildCTPOP(NarrowTy, UnmergeSrc.getReg(0));
- auto HiCTPOP = MIRBuilder.buildCTPOP(NarrowTy, UnmergeSrc.getReg(1));
- auto Out = MIRBuilder.buildAdd(NarrowTy, HiCTPOP, LoCTPOP);
- MIRBuilder.buildZExt(MI.getOperand(0), Out);
+ auto LoCTPOP = MIRBuilder.buildCTPOP(DstTy, UnmergeSrc.getReg(0));
+ auto HiCTPOP = MIRBuilder.buildCTPOP(DstTy, UnmergeSrc.getReg(1));
+ MIRBuilder.buildAdd(DstReg, HiCTPOP, LoCTPOP);
MI.eraseFromParent();
return Legalized;
diff --git a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
index 04e017d8b82e..762e07149592 100644
--- a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
@@ -216,6 +216,7 @@ MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) {
getActionDefinitionsBuilder(G_CTPOP)
.lowerFor({{s32, s32}})
+ .clampScalar(0, s32, s32)
.clampScalar(1, s32, s32);
// FP instructions
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