[PATCH] D73692: [PowerPC] Fix spilling of vector registers in PEI of EH aware functions

Stefan Pintilie via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 5 12:20:00 PST 2020


stefanp accepted this revision as: stefanp.
stefanp added a comment.
This revision is now accepted and ready to land.

Couple of nits but overall LGTM.



================
Comment at: llvm/lib/Target/PowerPC/PPCFrameLowering.cpp:2240
+            MF->getFunction().hasFnAttribute(Attribute::NoUnwind) ||
+            Subtarget.hasP9Vector())
+          TII.storeRegToStackSlot(MBB, MI, Reg, !IsLiveIn, CSI[i].getFrameIdx(),
----------------
nit:
This condition here in `spillCalleeSavedRegisters` needs to be identical to the one in `restoreCalleeSavedRegisters`. To avoid possible future bugs I would create a function to test for this and call it in both places. That would avoid a situation where someone adds a condition here and forgets to add it to `restoreCalleeSavedRegisters`.

Something like?
```
bool PPCFrameLowering::mustPreserveElementOrder(MachineFunction *MF) {
  return Subtarget.isLittleEndian() && !MF->getFunction().hasFnAttribute(Attribute::NoUnwind) && !Subtarget.hasP9Vector();
}
```


================
Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1321
+  if (Subtarget.hasVSX() && RC == &PPC::VRRCRegClass)
+    RC = &PPC::VSRCRegClass;
+
----------------
nit:
We can probably use `RC = updatedRC(RC);` like we do in `PPCInstrInfo::storeRegToStackSlot`.



Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73692/new/

https://reviews.llvm.org/D73692





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