[PATCH] D74032: [DAGCombine][ARM] Combine pattern for REV16

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer marked an inline comment as done.
SjoerdMeijer added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:5698
   EVT VT = N->getValueType(0);
   if (VT != MVT::i32)
     return SDValue();
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>This looks like it only works for MVT::i32 cases, but there doesn't seem to be any VT check?

That is checked here, but I will add an assert to `MatchBSwapHWordOrAndAnd`


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  https://reviews.llvm.org/D74032/new/

https://reviews.llvm.org/D74032