[PATCH] D73950: [AArch64] Make Read Write System Registers Read Only

[Oliver Stannard (Linaro) via Phabricator via llvm-commits]

ostannard requested changes to this revision.
ostannard added inline comments.
This revision now requires changes to proceed.


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Comment at: llvm/test/MC/AArch64/arm64-system-encoding.s:171
 ; CHECK: msr CSSELR_EL1, x3             ; encoding: [0x03,0x00,0x1a,0xd5]
-; CHECK: msr CurrentEL, x3              ; encoding: [0x43,0x42,0x18,0xd5]
+; NOECV: :[[@LINE-94]]: error: expected writable system register or pstate
 ; CHECK: msr DACR32_EL2, x3             ; encoding: [0x03,0x30,0x1c,0xd5]
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The `NOECV` check prefix isn't used by any FileCheck commands.


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Comment at: llvm/test/MC/AArch64/armv8.2a-statistical-profiling.s:1
-// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+spe < %s | FileCheck %s
-// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=neoverse-n1 < %s | FileCheck %s
-// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding < %s 2>&1 | FileCheck --check-prefix=NO_SPE %s
+// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+spe       < %s 2> %t | FileCheck %s
+// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=neoverse-n1 < %s 2> %t | FileCheck %s
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The stderr from this llvm-mc execution is redirected to a temp file, but not checked.


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Comment at: llvm/test/MC/AArch64/armv8.2a-statistical-profiling.s:7
+
+// NO_SPE_OUT-NOT: {{msr}}
 
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Why are you just checking `msr`, and not `mrs` or `psb`?


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Comment at: llvm/test/MC/AArch64/basic-a64-instructions.s:4062
 // CHECK: msr      {{daif|DAIF}}, x12                  // encoding: [0x2c,0x42,0x1b,0xd5]
-// CHECK: msr      {{CurrentEL|CURRENTEL}}, x12             // encoding: [0x4c,0x42,0x18,0xd5]
+// ERROR: :[[@LINE-254]]:6: error: expected writable system register or pstate
 // CHECK: msr      {{SPSR_irq|SPSR_IRQ}}, x12              // encoding: [0x0c,0x43,0x1c,0xd5]
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simon_tatham wrote:
> Same comment here.
This should be moved to basic-a64-diagnostics.s, there's a block of tests like this around line 3600.


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Comment at: llvm/test/MC/AArch64/gicv3-regs.s:206
 // CHECK: msr      {{ich_hcr_el2|ICH_HCR_EL2}}, x1            // encoding: [0x01,0xcb,0x1c,0xd5]
-// CHECK: msr      {{ich_misr_el2|ICH_MISR_EL2}}, x10          // encoding: [0x4a,0xcb,0x1c,0xd5]
+// ERROR: [[@LINE-54]]:13: error: expected writable system register or pstate
 // CHECK: msr      {{ich_vmcr_el2|ICH_VMCR_EL2}}, x24          // encoding: [0xf8,0xcb,0x1c,0xd5]
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simon_tatham wrote:
> And here.
Move to gicv3-regs-diagnostics.s.


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  https://reviews.llvm.org/D73950/new/

https://reviews.llvm.org/D73950