[PATCH] D72610: GlobalISel: Implement fewerElementsVector for G_SEXT_INREG

[Amara Emerson via Phabricator via llvm-commits]

aemerson accepted this revision.
aemerson added a comment.
This revision is now accepted and ready to land.

It's a real struggle for me to review AMDGPU legalizer changes sometimes. I wish we had smaller, more obvious for the change being made.



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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir:209
     ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY [[DEF]](<2 x s32>)
-    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
     ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
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Why did this test change?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72610/new/

https://reviews.llvm.org/D72610