[PATCH] D73135: [AArch64][ARM] Always expand ordered vector reductions (PR44600)

[Nikita Popov via Phabricator via llvm-commits]

nikic added a comment.

I was working off the assumption that no backend could reasonably make use of these ops due to lack of legalization, but I guess it's still possible to use them if you only opt-in to exactly those VTs that you can directly lower. I've now updated the patch to make it ARM/AArch64 specific, via the shouldExpandReductions() TTI hook.


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