[PATCH] D73247: AMDGPU/GlobalISel: Select V_ADD3_U32/V_XOR3_B32

[Matt Arsenault via Phabricator via llvm-commits]

arsenm updated this revision to Diff 239762.
arsenm added a comment.

Fixed pattern that blocked or3 formation


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73247/new/

https://reviews.llvm.org/D73247

Files:
  llvm/lib/Target/AMDGPU/VOP3Instructions.td
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-add3.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-or3.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xfail.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll

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