[llvm] 349f6bb - [gn build] (manually) port a174f0da62f

[Nico Weber via llvm-commits]

Author: Nico Weber
Date: 2020-01-22T11:08:34-05:00
New Revision: 349f6bb873df600b30b0cb2a51c940c0b9a46fb3

URL: https://github.com/llvm/llvm-project/commit/349f6bb873df600b30b0cb2a51c940c0b9a46fb3
DIFF: https://github.com/llvm/llvm-project/commit/349f6bb873df600b30b0cb2a51c940c0b9a46fb3.diff

LOG: [gn build] (manually) port a174f0da62f

Added: 
    

Modified: 
    llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn

Removed: 
    


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diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
index 621458df86c4..25924d13148b 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
@@ -24,6 +24,15 @@ tablegen("AMDGPUGenGlobalISel") {
   td_file = "AMDGPUGISel.td"
 }
 
+tablegen("AMDGPUGenGICombiner") {
+  visibility = [ ":LLVMAMDGPUCodeGen" ]
+  args = [
+    "-gen-global-isel-combiner",
+    "-combiners=AMDGPUPreLegalizerCombinerHelper",
+  ]
+  td_file = "AMDGPUGISel.td"
+}
+
 tablegen("AMDGPUGenMCPseudoLowering") {
   visibility = [ ":LLVMAMDGPUCodeGen" ]
   args = [ "-gen-pseudo-lowering" ]
@@ -60,6 +69,7 @@ static_library("LLVMAMDGPUCodeGen") {
     ":AMDGPUGenCallingConv",
     ":AMDGPUGenDAGISel",
     ":AMDGPUGenGlobalISel",
+    ":AMDGPUGenGICombiner",
     ":AMDGPUGenMCPseudoLowering",
     ":AMDGPUGenRegisterBank",
     ":R600GenCallingConv",
@@ -115,6 +125,7 @@ static_library("LLVMAMDGPUCodeGen") {
     "AMDGPUMacroFusion.cpp",
     "AMDGPUOpenCLEnqueuedBlockLowering.cpp",
     "AMDGPUPerfHintAnalysis.cpp",
+    "AMDGPUPreLegalizerCombiner.cpp",
     "AMDGPUPrintfRuntimeBinding.cpp",
     "AMDGPUPromoteAlloca.cpp",
     "AMDGPUPropagateAttributes.cpp",