[PATCH] D72961: In early-ifconversion check that the operands of a PHI share a common regclass with the destination regclass.
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 17 14:52:44 PST 2020
aemerson created this revision.
aemerson added reviewers: eli.friedman, paquette, qcolombet.
aemerson added a project: LLVM.
Herald added subscribers: hiraditya, kristof.beyls.
In GlobalISel we may in some unfortunate circumstances generate PHIs with operands that are on separate banks. If-conversion doesn't currently check for that case and ends up generating a CSEL on AArch64 with incorrect register operands.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D72961
Files:
llvm/lib/CodeGen/EarlyIfConversion.cpp
llvm/test/CodeGen/AArch64/early-ifcvt-regclass-mismatch.mir
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