[PATCH] D72709: [codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU.

[Mikael Holmén via Phabricator via llvm-commits]

uabelho added a comment.
Herald added a subscriber: kerbowa.

Hi,

In my out-of-tree target we are running DeadMachineInstructionElim after SSA, and now of course the new assert fails.

But you're saying that it needs SSA or it can cause miscompiles?


Repository:
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  https://reviews.llvm.org/D72709/new/

https://reviews.llvm.org/D72709