[PATCH] D72799: [SVE] Add SVE2 patterns for unpredicated multiply instructions

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

Can we also also add mul patterns for targets that have SVE, but not SVE2?



================
Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:1192
+
+def int_aarch64_sve_mul_z      : AdvSIMD_Pred2VectorArg_Intrinsic;
+def int_aarch64_sve_smulh_z    : AdvSIMD_Pred2VectorArg_Intrinsic;
----------------
This name seems strange.  Why "z"?


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  https://reviews.llvm.org/D72799/new/

https://reviews.llvm.org/D72799