[PATCH] D68685: [RISCV] Scheduler description for Rocket Core

[Evandro Menezes via Phabricator via llvm-commits]

evandro added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVSchedule.td:22
+def WriteFence      : SchedWrite;    // Fence instructions
+def WriteNop        : SchedWrite;
+def WriteLDB        : SchedWrite;    // Load byte
----------------
evandro wrote:
> I don't think that `nop` needs a scheduling class.
Oh, never mind me.  A `SchedWrite` is necessary to capture its µop, assuming it's not subsumed by the fetch engine.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68685/new/

https://reviews.llvm.org/D68685