[PATCH] D72606: AMDGPU/GlobalISel: Handle 16-bank LDS llvm.amdgcn.interp.p1.f16

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 13 05:39:08 PST 2020


arsenm created this revision.
arsenm added reviewers: nhaehnle, kerbowa.
Herald added subscribers: Petar.Avramovic, hiraditya, t-tye, tpr, dstuttard, rovka, yaxunl, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.
arsenm added a parent revision: D72080: AMDGPU: Partially directly select llvm.amdgcn.interp.p1.f16.

The pattern is also mishandled by the generated matcher, so workaround
this as in the DAG path.

      

The existing DAG tests aren't particularly targeted to just this one
intrinsic. These also end up differing in scheduling from SGPR->VGPR
operand constraint copies.


https://reviews.llvm.org/D72606

Files:
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll

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