[PATCH] D72605: AMDGPU: Directly select 16-bank LDS case of llvm.amdgcn.interp.p1.f16

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: nhaehnle, tpr, dstuttard, rampitec.
Herald added subscribers: hiraditya, t-tye, yaxunl, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.
arsenm added a parent revision: D72080: AMDGPU: Partially directly select llvm.amdgcn.interp.p1.f16.

Manually select this is as a tablegen workraound. Both SelectionDAG
and GlobalISel end up misplacing the copy to m0 when both instructions
in the output need it. Neither considers that both output instructions
depend on m0. I don't know of any other pattern we need to handle this
case, so it's less effort to just workaround this for now.


https://reviews.llvm.org/D72605

Files:
  llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
  llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/VOP3Instructions.td

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