[llvm] 4569f63 - ARMLowOverheadLoops: a few more dbg msgs to better trace rejected TP loops. NFC.

[Sjoerd Meijer via llvm-commits]

Author: Sjoerd Meijer
Date: 2020-01-10T14:11:52Z
New Revision: 4569f63ae1cb520ce28f08f4800dfbcd5f255eed

URL: https://github.com/llvm/llvm-project/commit/4569f63ae1cb520ce28f08f4800dfbcd5f255eed
DIFF: https://github.com/llvm/llvm-project/commit/4569f63ae1cb520ce28f08f4800dfbcd5f255eed.diff

LOG: ARMLowOverheadLoops: a few more dbg msgs to better trace rejected TP loops. NFC.

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
index 6c45eecf0c23..91aba859e1b1 100644
--- a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
+++ b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
@@ -338,8 +338,8 @@ static bool IsSafeToMove(MachineInstr *From, MachineInstr *To, ReachingDefAnalys
 }
 
 bool LowOverheadLoop::ValidateTailPredicate(MachineInstr *StartInsertPt,
-		                            ReachingDefAnalysis *RDA,
-		                            MachineLoopInfo *MLI) {
+    ReachingDefAnalysis *RDA, MachineLoopInfo *MLI) {
+  assert(VCTP && "VCTP instruction expected but is not set");
   // All predication within the loop should be based on vctp. If the block
   // isn't predicated on entry, check whether the vctp is within the block
   // and that all other instructions are then predicated on it.
@@ -471,7 +471,9 @@ void LowOverheadLoop::CheckLegality(ARMBasicBlockUtils *BBUtils,
     LLVM_DEBUG(dbgs() << "ARM Loops: Start insertion point: " << *InsertPt);
 
   if (!IsTailPredicationLegal()) {
-    LLVM_DEBUG(dbgs() << "ARM Loops: Tail-predication is not valid.\n");
+    LLVM_DEBUG(if (!VCTP)
+                 dbgs() << "ARM Loops: Didn't find a VCTP instruction.\n";
+               dbgs() << "ARM Loops: Tail-predication is not valid.\n");
     return;
   }
 
@@ -656,8 +658,10 @@ bool ARMLowOverheadLoops::ProcessLoop(MachineLoop *ML) {
   }
 
   LLVM_DEBUG(LoLoop.dump());
-  if (!LoLoop.FoundAllComponents())
+  if (!LoLoop.FoundAllComponents()) {
+    LLVM_DEBUG(dbgs() << "ARM Loops: Didn't find loop start, update, end\n");
     return false;
+  }
 
   LoLoop.CheckLegality(BBUtils.get(), RDA, MLI);
   Expand(LoLoop);
@@ -817,17 +821,19 @@ void ARMLowOverheadLoops::RemoveLoopUpdate(LowOverheadLoop &LoLoop) {
   LLVM_DEBUG(dbgs() << "ARM Loops: Trying to remove loop update stmt\n");
 
   if (LoLoop.ML->getNumBlocks() != 1) {
-    LLVM_DEBUG(dbgs() << "ARM Loops: single block loop expected\n");
+    LLVM_DEBUG(dbgs() << "ARM Loops: Single block loop expected\n");
     return;
   }
 
-  LLVM_DEBUG(dbgs() << "ARM Loops: Analyzing MO: ";
+  LLVM_DEBUG(dbgs() << "ARM Loops: Analyzing elemcount in operand: ";
              LoLoop.VCTP->getOperand(1).dump());
 
   // Find the definition we are interested in removing, if there is one.
   MachineInstr *Def = RDA->getReachingMIDef(LastInstrInBlock, ElemCount);
-  if (!Def)
+  if (!Def) {
+    LLVM_DEBUG(dbgs() << "ARM Loops: Can't find a def, nothing to do.\n");
     return;
+  }
 
   // Bail if we define CPSR and it is not dead
   if (!Def->registerDefIsDead(ARM::CPSR, TRI)) {
@@ -859,6 +865,9 @@ void ARMLowOverheadLoops::RemoveLoopUpdate(LowOverheadLoop &LoLoop) {
                Def->dump());
     Def->eraseFromParent();
   }
+
+  LLVM_DEBUG(dbgs() << "ARM Loops: Can't remove loop update, it's used by:\n";
+             for (auto U : Uses) U->dump());
 }
 
 void ARMLowOverheadLoops::ConvertVPTBlocks(LowOverheadLoop &LoLoop) {