[llvm] 577b0b5 - AMDGPU/GlobalISel: Fix missing test for s16 icmp
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 7 13:36:42 PST 2020
Author: Matt Arsenault
Date: 2020-01-07T16:36:31-05:00
New Revision: 577b0b5f540866fa7b23cb3e284d5ccd9a2a88f5
URL: https://github.com/llvm/llvm-project/commit/577b0b5f540866fa7b23cb3e284d5ccd9a2a88f5
DIFF: https://github.com/llvm/llvm-project/commit/577b0b5f540866fa7b23cb3e284d5ccd9a2a88f5.diff
LOG: AMDGPU/GlobalISel: Fix missing test for s16 icmp
Added:
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir
new file mode 100644
index 000000000000..fa2068c71aa7
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir
@@ -0,0 +1,236 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=WAVE64 %s
+# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=WAVE32 %s
+
+---
+
+name: icmp_eq_s16_sv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0, $vgpr0
+
+ ; WAVE64-LABEL: name: icmp_eq_s16_sv
+ ; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+ ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE64: [[V_CMP_EQ_U16_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_EQ_U16_e64_]]
+ ; WAVE32-LABEL: name: icmp_eq_s16_sv
+ ; WAVE32: $vcc_hi = IMPLICIT_DEF
+ ; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+ ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE32: [[V_CMP_EQ_U16_e64_:%[0-9]+]]:sreg_32 = V_CMP_EQ_U16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_EQ_U16_e64_]]
+ %0:sgpr(s32) = COPY $sgpr0
+ %1:vgpr(s32) = COPY $vgpr0
+ %2:sgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vcc(s1) = G_ICMP intpred(eq), %2, %3
+ S_ENDPGM 0, implicit %4
+...
+
+---
+
+name: icmp_eq_s16_vs
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0, $vgpr0
+
+ ; WAVE64-LABEL: name: icmp_eq_s16_vs
+ ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
+ ; WAVE64: [[V_CMP_EQ_U16_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_EQ_U16_e64_]]
+ ; WAVE32-LABEL: name: icmp_eq_s16_vs
+ ; WAVE32: $vcc_hi = IMPLICIT_DEF
+ ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
+ ; WAVE32: [[V_CMP_EQ_U16_e64_:%[0-9]+]]:sreg_32 = V_CMP_EQ_U16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_EQ_U16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:sgpr(s32) = COPY $sgpr0
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:sgpr(s16) = G_TRUNC %1
+ %4:vcc(s1) = G_ICMP intpred(eq), %2, %3
+ S_ENDPGM 0, implicit %4
+...
+
+---
+
+name: icmp_eq_s16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; WAVE64-LABEL: name: icmp_eq_s16_vv
+ ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; WAVE64: [[V_CMP_EQ_U16_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_EQ_U16_e64_]]
+ ; WAVE32-LABEL: name: icmp_eq_s16_vv
+ ; WAVE32: $vcc_hi = IMPLICIT_DEF
+ ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; WAVE32: [[V_CMP_EQ_U16_e64_:%[0-9]+]]:sreg_32 = V_CMP_EQ_U16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_EQ_U16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vcc(s1) = G_ICMP intpred(eq), %2, %3
+ S_ENDPGM 0, implicit %4
+...
+
+---
+
+name: icmp_ne_s16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; WAVE64-LABEL: name: icmp_ne_s16_vv
+ ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; WAVE64: [[V_CMP_NE_U16_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_NE_U16_e64_]]
+ ; WAVE32-LABEL: name: icmp_ne_s16_vv
+ ; WAVE32: $vcc_hi = IMPLICIT_DEF
+ ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; WAVE32: [[V_CMP_NE_U16_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_NE_U16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vcc(s1) = G_ICMP intpred(ne), %2, %3
+ S_ENDPGM 0, implicit %4
+...
+
+---
+
+name: icmp_slt_s16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; WAVE64-LABEL: name: icmp_slt_s16_vv
+ ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; WAVE64: [[V_CMP_LT_I16_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_I16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_LT_I16_e64_]]
+ ; WAVE32-LABEL: name: icmp_slt_s16_vv
+ ; WAVE32: $vcc_hi = IMPLICIT_DEF
+ ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; WAVE32: [[V_CMP_LT_I16_e64_:%[0-9]+]]:sreg_32 = V_CMP_LT_I16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_LT_I16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vcc(s1) = G_ICMP intpred(slt), %2, %3
+ S_ENDPGM 0, implicit %4
+...
+
+---
+
+name: icmp_sle_s16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; WAVE64-LABEL: name: icmp_sle_s16_vv
+ ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; WAVE64: [[V_CMP_LE_I16_e64_:%[0-9]+]]:sreg_64 = V_CMP_LE_I16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_LE_I16_e64_]]
+ ; WAVE32-LABEL: name: icmp_sle_s16_vv
+ ; WAVE32: $vcc_hi = IMPLICIT_DEF
+ ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; WAVE32: [[V_CMP_LE_I16_e64_:%[0-9]+]]:sreg_32 = V_CMP_LE_I16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_LE_I16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vcc(s1) = G_ICMP intpred(sle), %2, %3
+ S_ENDPGM 0, implicit %4
+...
+
+---
+
+name: icmp_ult_s16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; WAVE64-LABEL: name: icmp_ult_s16_vv
+ ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; WAVE64: [[V_CMP_LT_U16_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_LT_U16_e64_]]
+ ; WAVE32-LABEL: name: icmp_ult_s16_vv
+ ; WAVE32: $vcc_hi = IMPLICIT_DEF
+ ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; WAVE32: [[V_CMP_LT_U16_e64_:%[0-9]+]]:sreg_32 = V_CMP_LT_U16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_LT_U16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vcc(s1) = G_ICMP intpred(ult), %2, %3
+ S_ENDPGM 0, implicit %4
+...
+
+---
+
+name: icmp_ule_s16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; WAVE64-LABEL: name: icmp_ule_s16_vv
+ ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; WAVE64: [[V_CMP_LE_U16_e64_:%[0-9]+]]:sreg_64 = V_CMP_LE_U16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_LE_U16_e64_]]
+ ; WAVE32-LABEL: name: icmp_ule_s16_vv
+ ; WAVE32: $vcc_hi = IMPLICIT_DEF
+ ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; WAVE32: [[V_CMP_LE_U16_e64_:%[0-9]+]]:sreg_32 = V_CMP_LE_U16_e64 [[COPY]], [[COPY1]], implicit $exec
+ ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_LE_U16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vcc(s1) = G_ICMP intpred(ule), %2, %3
+ S_ENDPGM 0, implicit %4
+...
+
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