[PATCH] D72348: AMDGPU: Apply i16 add->sub pattern with zext to i32

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D72348#1808333 <https://reviews.llvm.org/D72348#1808333>, @rampitec wrote:

> Will it correctly work with and without sram-ecc? I.e. do we have any assumptions about high 16 content of an i16 value anywhere?


That only matters for memory accesses as far as I know. This isn't really a new pattern, and the existing predicates don't check


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https://reviews.llvm.org/D72348