[PATCH] D72302: [X86] Improve lowering of v2i64 sign bit tests on pre-sse4.2 targets

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:21579
+        static const int MaskHi[] = { 1, 1, 3, 3 };
+        SDValue Result = DAG.getVectorShuffle(MVT::v4i32, dl, GT, GT, MaskHi);
+
----------------
emit PSHUFD directly?


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:21582
+        if (Invert)
+          Result = DAG.getNOT(dl, Result, MVT::v4i32);
+
----------------
Would the invert case be better as a PSRAD xmm, 31 + the shuffle ?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72302/new/

https://reviews.llvm.org/D72302