[PATCH] D72175: AMDGPU: Define mode register

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

In D72175#1803554 <https://reviews.llvm.org/D72175#1803554>, @arsenm wrote:

> In D72175#1803537 <https://reviews.llvm.org/D72175#1803537>, @rampitec wrote:
>
> > I would define individual fields as separate registers. That way we will be able to reschedule instructions across some mode changes if these instructions are not affected by a particular change.
>
>
> I think that's way overcomplicated, especially for the frequency of mode writes. There's a cost to adding each register and register operand


We used to have this optimization with HSAIL and it deemed to be quite profitable.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72175/new/

https://reviews.llvm.org/D72175