[PATCH] D72175: AMDGPU: Define mode register

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D72175#1803537 <https://reviews.llvm.org/D72175#1803537>, @rampitec wrote:

> I would define individual fields as separate registers. That way we will be able to reschedule instructions across some mode changes if these instructions are not affected by a particular change.


I think that's way overcomplicated, especially for the frequency of mode writes. There's a cost to adding each register and register operand


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