[PATCH] D71934: [AMDGPU] need to insert wait between the scalar load and vector store to the same address to avoid WAR conflict.

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec accepted this revision.
rampitec added a comment.
This revision is now accepted and ready to land.

LGTM. Delete source_filename from the test before push.



================
Comment at: llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll:8
+
+source_filename = "smrd_vmem_war.ll.bak"
+define amdgpu_kernel void @zot(i32 addrspace(1)* nocapture %arg, i64 addrspace(1)* nocapture %arg1) {
----------------
Delete this line.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71934/new/

https://reviews.llvm.org/D71934