[PATCH] D72033: [AArch64] Enable post-RA sched for more cores
Sam Parker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 31 03:28:08 PST 2019
samparker created this revision.
samparker added reviewers: efriedma, dmgreen, fhahn, t.p.northover, MatzeB.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: LLVM.
Bring the remaining Cortex cores, using the A53 and A57 models, in line with the other targets by enabling post-ra scheduling. The Cortex-A72 also now uses the FuseLiteral flag, the same as the Cortex-A57, as the optimization guide recommends. The Cortex-A73 also gains this flag.
https://reviews.llvm.org/D72033
Files:
llvm/lib/Target/AArch64/AArch64.td
llvm/test/CodeGen/AArch64/postra-mi-sched.ll
llvm/test/CodeGen/AArch64/postra-misched-a53-model.mir
llvm/test/CodeGen/AArch64/postra-misched-a57-model.mir
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D72033.235699.patch
Type: text/x-patch
Size: 52512 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20191231/0409acb7/attachment.bin>
More information about the llvm-commits
mailing list