[PATCH] D71917: Optimization of inserting vxi1 sub vector into vXi1 vector

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:5902
+    APInt Mask0(NumElems, 0);
+    Mask0.setBits(IdxVal, IdxVal + SubVecNumElems);
+    Mask0.flipAllBits();
----------------
APInt Mask0 = APInt::getBitsSet(NumElems, IdxVal, IdxVal + SubVecNumElems) ?


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:5913
+  
+    // Reduce to original width if needed.
+    return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, Op, ZeroIdx);
----------------
"if needed" ?


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71917/new/

https://reviews.llvm.org/D71917