[PATCH] D71822: [ELF] Delete the RelExpr member R_HINT. NFC
Fangrui Song via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 23 11:51:16 PST 2019
MaskRay updated this revision to Diff 235171.
MaskRay marked 2 inline comments as done.
MaskRay added a comment.
Simplify
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71822/new/
https://reviews.llvm.org/D71822
Files:
lld/ELF/Arch/ARM.cpp
lld/ELF/Arch/RISCV.cpp
lld/ELF/Relocations.cpp
lld/ELF/Relocations.h
Index: lld/ELF/Relocations.h
===================================================================
--- lld/ELF/Relocations.h
+++ lld/ELF/Relocations.h
@@ -40,7 +40,6 @@
R_GOTPLT,
R_GOTPLTREL,
R_GOTREL,
- R_HINT,
R_NEG_TLS,
R_NONE,
R_PC,
Index: lld/ELF/Relocations.cpp
===================================================================
--- lld/ELF/Relocations.cpp
+++ lld/ELF/Relocations.cpp
@@ -1258,8 +1258,8 @@
const uint8_t *relocatedAddr = sec.data().begin() + rel.r_offset;
RelExpr expr = target->getRelExpr(type, sym, relocatedAddr);
- // Ignore "hint" relocations because they are only markers for relaxation.
- if (oneof<R_HINT, R_NONE>(expr))
+ // Ignore R_*_NONE and other marker relocations.
+ if (expr == R_NONE)
return;
// We can separate the small code model relocations into 2 categories:
Index: lld/ELF/Arch/RISCV.cpp
===================================================================
--- lld/ELF/Arch/RISCV.cpp
+++ lld/ELF/Arch/RISCV.cpp
@@ -229,7 +229,7 @@
case R_RISCV_RELAX:
case R_RISCV_ALIGN:
case R_RISCV_TPREL_ADD:
- return R_HINT;
+ return R_NONE;
default:
return R_ABS;
}
Index: lld/ELF/Arch/ARM.cpp
===================================================================
--- lld/ELF/Arch/ARM.cpp
+++ lld/ELF/Arch/ARM.cpp
@@ -140,7 +140,7 @@
// given address. It can be used to implement a special linker mode which
// rewrites ARMv4T inputs to ARMv4. Since we support only ARMv4 input and
// not ARMv4 output, we can just ignore it.
- return R_HINT;
+ return R_NONE;
default:
return R_ABS;
}
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