[PATCH] D71401: [AArch64][SVE] Add permutation and selection intrinsics
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 13 11:19:27 PST 2019
efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.
LGTM
================
Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:1182
def int_aarch64_sve_sunpklo : AdvSIMD_SVE_Unpack_Intrinsic;
-
+def int_aarch64_sve_tbl : AdvSIMD_SVE_TBL_Intrinsic;
+def int_aarch64_sve_trn1 : AdvSIMD_2VectorArg_Intrinsic;
----------------
c-rhodes wrote:
> efriedma wrote:
> > Any thoughts on naming tbl for one-register and two-register forms?
> By two-register I assume you're referring to the SVE2 form which has two source registers? Downstream we name this `int_aarch64_sve_tbl2` and it's implemented with the same class as TBX.
I guess that's fine.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71401/new/
https://reviews.llvm.org/D71401
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