[PATCH] D71298: [AArch64][SVE] Add patterns for scalable vselect
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 10 14:31:31 PST 2019
efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.
LGTM
On a sort of related note, AArch64ISelLowering.cpp says that MVT::nxv1f32 and MVT::nxv1f64 are also legal? Do we plan to implement isel patterns for them?
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rL LLVM
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https://reviews.llvm.org/D71298/new/
https://reviews.llvm.org/D71298
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