[llvm] 761dd78 - Fix a few doc typos, to cycle bots.

[Nico Weber via llvm-commits]

Author: Nico Weber
Date: 2019-12-08T18:51:48-05:00
New Revision: 761dd780eaad02b8f3258e279cd21408b2067baf

URL: https://github.com/llvm/llvm-project/commit/761dd780eaad02b8f3258e279cd21408b2067baf
DIFF: https://github.com/llvm/llvm-project/commit/761dd780eaad02b8f3258e279cd21408b2067baf.diff

LOG: Fix a few doc typos, to cycle bots.

Added: 
    

Modified: 
    llvm/docs/AMDGPUUsage.rst

Removed: 
    


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diff  --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 758e65c63e8e..4354c4d0f1c1 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -2134,23 +2134,23 @@ supported except by flat and scratch instructions in GFX9-GFX10.
 
 The generic address space uses the hardware flat address support available in
 GFX7-GFX10. This uses two fixed ranges of virtual addresses (the private and
-local appertures), that are outside the range of addressible global memory, to
+local apertures), that are outside the range of addressible global memory, to
 map from a flat address to a private or local address.
 
 FLAT instructions can take a flat address and access global, private (scratch)
 and group (LDS) memory depending in if the address is within one of the
-apperture ranges. Flat access to scratch requires hardware aperture setup and
+aperture ranges. Flat access to scratch requires hardware aperture setup and
 setup in the kernel prologue (see :ref:`amdgpu-amdhsa-flat-scratch`). Flat
 access to LDS requires hardware aperture setup and M0 (GFX7-GFX8) register setup
 (see :ref:`amdgpu-amdhsa-m0`).
 
 To convert between a segment address and a flat address the base address of the
-appertures address can be used. For GFX7-GFX8 these are available in the
+apertures address can be used. For GFX7-GFX8 these are available in the
 :ref:`amdgpu-amdhsa-hsa-aql-queue` the address of which can be obtained with
 Queue Ptr SGPR (see :ref:`amdgpu-amdhsa-initial-kernel-execution-state`). For
-GFX9-GFX10 the appature base addresses are directly available as inline constant
+GFX9-GFX10 the aperture base addresses are directly available as inline constant
 registers ``SRC_SHARED_BASE/LIMIT`` and ``SRC_PRIVATE_BASE/LIMIT``. In 64 bit
-address mode the apperture sizes are 2^32 bytes and the base is aligned to 2^32
+address mode the aperture sizes are 2^32 bytes and the base is aligned to 2^32
 which makes it easier to convert from flat to segment or segment to flat.
 
 Image and Samplers
@@ -2884,7 +2884,7 @@ SGPR register initial state is defined in
                                                     FLAT SCRATCH BASE in flat
                                                     memory instructions that
                                                     access the scratch
-                                                    apperture.
+                                                    aperture.
 
                                                     The second SGPR is 32 bit
                                                     byte size of a single