[PATCH] D70881: [X86] Model MXCSR for all AVX512 instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/X86/X86InstrAVX512.td:7121
                                   XS, VEX_W, EVEX_CD8<64, CD8VT1>;
 defm VCVTUSI2SDZ   : avx512_vcvtsi<0x7B, null_frag, WriteCvtI2SD, GR32, v2f64x_info,
                                   i32mem, loadi32, "cvtusi2sd", "l">,
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Don't we need to suppress MXCSR and exceptions here


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Comment at: llvm/lib/Target/X86/X86InstrInfo.cpp:1764
   case X86::VCMPPSZ256rrik: {
-    unsigned Imm = MI.getOperand(MI.getNumOperands() - 1).getImm() & 0x1f;
+    unsigned Imm = MI.getOperand(MI.getNumOperands() - 2).getImm() & 0x1f;
     Imm = X86::getSwappedVCMPImm(Imm);
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pengfei wrote:
> craig.topper wrote:
> > Use getNumExplicitOperands() - 1 instead.
> Thanks!
Is this line longer than 80 columns?


Repository:
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  https://reviews.llvm.org/D70881/new/

https://reviews.llvm.org/D70881