[PATCH] D70812: [Aarch64][SVE] Add DAG combine rules for gather loads and sext/zext

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:9948
+                                 TargetLowering::DAGCombinerInfo &DCI,
+                                 const AArch64Subtarget *Subtarget) {
   SelectionDAG &DAG = DCI.DAG;
----------------
`AArch64Subtarget *Subtarget` isn't used by `performSVEAndCombine`, so you can remove this change.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:11932
+
+  if ((SignExtSrcVT != GLD1SrcMemVT) || !Src.hasOneUse())
+    return SDValue();
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The condition `Src.hasOneUse()` is not in the SVEAndCombine, so you probably want to add one there as well.
Also please make sure both cases have a unit test.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70812/new/

https://reviews.llvm.org/D70812