[PATCH] D70806: [Aarch64][SVE] Add intrinsics for gather loads (vector + imm)
Andrzej Warzynski via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 28 02:53:08 PST 2019
andwar marked an inline comment as done.
andwar added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:458
- defm GLDFF1SH_D : sve_mem_64b_gld_vi_64_ptrs<0b0101, "ldff1sh", uimm5s2>;
- defm GLD1H_D : sve_mem_64b_gld_vi_64_ptrs<0b0110, "ld1h", uimm5s2>;
- defm GLDFF1H_D : sve_mem_64b_gld_vi_64_ptrs<0b0111, "ldff1h", uimm5s2>;
----------------
This should remain as `uimm5s2`. I will fix this in the following patch.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D70806/new/
https://reviews.llvm.org/D70806
More information about the llvm-commits
mailing list