[PATCH] D70670: [RISCV] Implement canRealignStack

[Sam Elliott via Phabricator via llvm-commits]

lenary abandoned this revision.
lenary added a comment.

In D70670#1759877 <https://reviews.llvm.org/D70670#1759877>, @shiva0217 wrote:

> With the patch, double load/store instructions may unaligned-access with -mabi=ilp32e -mattr=+d flags. Could the load/store support unaligned-access?


My understanding was that RISC-V mandated that misaligned loads/stores had to be supported, even if that was via emulation in a trap handler. Having re-read the specification, I realise I am wrong (the trap handler, if used, is not required to emulate the misaligned load/store using aligned loads and stores).

I think this solution "works" because `needsStackRealignment` only returns true if `canRealignStack` returns true. I shall go back to the solution involving detecting ILP32E and the D extension (and potentially the sizes of the used registers).


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70670/new/

https://reviews.llvm.org/D70670