[PATCH] D70666: [WIP][RISCV] Machine Operand Flag Serialization

Mon Nov 25 12:09:36 PST 2019

jrtc27 added inline comments.

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Comment at: llvm/test/CodeGen/RISCV/mir-target-flags.ll:17
+ at g_i = internal global i32 0
+ at t_un = thread_local global i32 42
+ at t_ld = thread_local(localdynamic) global i32 42
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Since these are not external and the file is built without PIC, they are all being optimised to LE. With D70649, making them external would at least make them all IE except for `@t_le`, but in order to get GD and LD you need to have a PIC invocation. This will also get you MO_PLT and MO_GOT_HI cases for free.

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Comment at: llvm/test/CodeGen/RISCV/mir-target-flags.ll:64
+  %sum.d = add i32 %sum.c, %d
+  %sum.e = add i32 %sum.b, %e
+  %sum.f = add i32 %sum.e, %f
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RHS typo (hence why there is no `@t_ud` in the test output).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70666/new/

https://reviews.llvm.org/D70666