[PATCH] D70614: AMDGPU: Reuse carry out register during FI elimination

[Austin Kerbow via Phabricator via llvm-commits]

kerbowa created this revision.
kerbowa added reviewers: arsenm, rampitec.
Herald added subscribers: llvm-commits, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.

Pre gfx9 we need to scavenge a 64-bit SGPR to use as the carry out for an Add.
If only one SGPR was available this crashed when trying to scavenge another
32bit SGPR to materialize the offset.

Instead, reuse a 32-bit SGPR from the carry out as the offset register.

Also prefer to use vcc for the unused carry out when it is available.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D70614

Files:
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir

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