[PATCH] D70490: [mips] Add a 'generic' Mips CPU

[Miloš Stojanović via Phabricator via llvm-commits]

mstojanovic updated this revision to Diff 230429.
mstojanovic added a comment.

Added `FeatureMips32` feature.

I came across this while running llvm-exegesis on a mips board, e.g.:

  llvm-exegesis -mode latency -snippets-file /dev/null

It gets the 'generic' CPU name with `sys::getHostCPUName()` and calls `createTargetMachine()`, which then emits a warning:

  'generic' is not a recognized processor for this target (ignoring processor)

Should  I add a unittest that recreates this process?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70490/new/

https://reviews.llvm.org/D70490

Files:
  llvm/lib/Target/Mips/Mips.td
  llvm/test/CodeGen/Mips/cpus.ll


Index: llvm/test/CodeGen/Mips/cpus.ll
===================================================================
--- llvm/test/CodeGen/Mips/cpus.ll
+++ llvm/test/CodeGen/Mips/cpus.ll
@@ -1,5 +1,9 @@
 ; Check that the CPU names work.
 
+; RUN: llc -mtriple=mips -mcpu=generic -filetype=obj < %s \
+; RUN:   | llvm-readelf -A | FileCheck %s --check-prefix=GENERIC
+; GENERIC: ISA: MIPS32
+
 ; RUN: llc -mtriple=mips -mcpu=mips2 -filetype=obj < %s \
 ; RUN:   | llvm-readelf -A | FileCheck %s --check-prefix=MIPS2
 ; MIPS2: ISA: MIPS2
Index: llvm/lib/Target/Mips/Mips.td
===================================================================
--- llvm/lib/Target/Mips/Mips.td
+++ llvm/lib/Target/Mips/Mips.td
@@ -232,6 +232,7 @@
 class Proc<string Name, list<SubtargetFeature> Features>
  : ProcessorModel<Name, MipsGenericModel, Features>;
 
+def : Proc<"generic", [FeatureMips32]>;
 def : Proc<"mips1", [FeatureMips1]>;
 def : Proc<"mips2", [FeatureMips2]>;
 def : Proc<"mips32", [FeatureMips32]>;


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