[PATCH] D70405: [AMDGPU] Fix emitIfBreak CF lowering: use a temp register to make register coalescer life easier.

[Valery Pykhtin via Phabricator via llvm-commits]

vpykhtin marked 2 inline comments as done.
vpykhtin added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/loop_break.ll:45
+; GCN:      s_or_b64          [[ACCUM_MASK]], [[AND_MASK]], [[ACCUM_MASK]]
+; GCN:      s_andn2_b64       exec, exec, [[ACCUM_MASK]]
 ; GCN-NEXT: s_cbranch_execnz  [[LOOP_ENTRY]]
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rampitec wrote:
> Probably use of GCN-NEXT here and s_or_b64 above will constitute for the proper testcase.
Did you mean other places too? It looks like a big change though.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70405/new/

https://reviews.llvm.org/D70405