[PATCH] D70405: [AMDGPU] Fix emitIfBreak CF lowering: use a temp register to make register coalescer life easier.

[Valery Pykhtin via Phabricator via llvm-commits]

vpykhtin updated this revision to Diff 230067.
vpykhtin added a comment.

updated the diff per comment. Used utils/update_llc_test_checks.py tool to update autogenerated test.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70405/new/

https://reviews.llvm.org/D70405

Files:
  llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
  llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
  llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
  llvm/test/CodeGen/AMDGPU/loop_break.ll
  llvm/test/CodeGen/AMDGPU/multilevel-break.ll
  llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
  llvm/test/CodeGen/AMDGPU/valu-i1.ll
  llvm/test/CodeGen/AMDGPU/wave32.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D70405.230067.patch
Type: text/x-patch
Size: 11190 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20191119/fc3932b1/attachment.bin>