[PATCH] D70407: [ARM] Generate CMSE instructions from CMSE intrinsics

[Dave Green via Phabricator via llvm-commits]

dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.

LGTM, with a few nits about formatting.



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Comment at: llvm/lib/Target/ARM/ARMInstrThumb2.td:4554
 
-def t2TT   : T2TT<0b00, "tt",   []>, Requires<[IsThumb,Has8MSecExt]>;
-def t2TTT  : T2TT<0b01, "ttt",  []>, Requires<[IsThumb,Has8MSecExt]>;
-def t2TTA  : T2TT<0b10, "tta",  []>, Requires<[IsThumb,Has8MSecExt]>;
-def t2TTAT : T2TT<0b11, "ttat", []>, Requires<[IsThumb,Has8MSecExt]>;
+def t2TT   : T2TT<0b00, "tt",   [(set rGPR:$Rt, (int_arm_cmse_tt   GPRnopc:$Rn))]>, Requires<[IsThumb,Has8MSecExt]>;
+def t2TTT  : T2TT<0b01, "ttt",  [(set rGPR:$Rt, (int_arm_cmse_ttt  GPRnopc:$Rn))]>, Requires<[IsThumb,Has8MSecExt]>;
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The Requires might be better on the next line.


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Comment at: llvm/test/CodeGen/ARM/intrinsics-cmse.ll:7
+
+define i32 @check_tt(i8* %p) #0 {
+entry:
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Remove the #0


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Comment at: llvm/test/CodeGen/ARM/intrinsics-cmse.ll:63
+
+; Function Attrs: nounwind readnone
+declare i32 @llvm.arm.cmse.tt(i8*) #1
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Remove this line.


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Comment at: llvm/test/CodeGen/ARM/intrinsics-cmse.ll:64
+; Function Attrs: nounwind readnone
+declare i32 @llvm.arm.cmse.tt(i8*) #1
+declare i32 @llvm.arm.cmse.ttt(i8*) #1
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Remove the #1


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70407/new/

https://reviews.llvm.org/D70407