[PATCH] D70405: [AMDGPU] Fix emitIfBreak CF lowering: use a temp register to make register coalescer life easier.
Valery Pykhtin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 18 10:32:00 PST 2019
vpykhtin updated this revision to Diff 229880.
vpykhtin added a comment.
added test fix.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D70405/new/
https://reviews.llvm.org/D70405
Files:
llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
llvm/test/CodeGen/AMDGPU/loop_break.ll
llvm/test/CodeGen/AMDGPU/multilevel-break.ll
llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
llvm/test/CodeGen/AMDGPU/valu-i1.ll
llvm/test/CodeGen/AMDGPU/wave32.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D70405.229880.patch
Type: text/x-patch
Size: 14007 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20191118/ea430ee3/attachment-0001.bin>
More information about the llvm-commits
mailing list