[PATCH] D69987: [RISCV] Assemble/Disassemble v-ext instructions.
James Clarke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 15 10:41:29 PST 2019
jrtc27 added a comment.
In D69987#1747790 <https://reviews.llvm.org/D69987#1747790>, @rogfer01 wrote:
> I think we will want decoding tests as well, at least one for instruction.
>
> One example follows:
>
> # RUN: llvm-mc --disassemble --triple riscv64 -mattr +v < %s | \
> # RUN: FileCheck %s
>
> # CHECK: vmerge.vvm v1, v3, v2, v0
> [0xd7,0x00,0x31,0x5c]
>
Isn't that already done by virtue of the uses of `llvm-objdump -d -` in the existing tests?
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https://reviews.llvm.org/D69987/new/
https://reviews.llvm.org/D69987
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