[PATCH] D70248: Disallow shift operations in debug expressions spanning multiple registers
Vedant Kumar via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 14 11:02:03 PST 2019
vsk added inline comments.
================
Comment at: llvm/test/CodeGen/ARM/debuginfo-split-carryexpr.ll:17
+; CHECK: DBG_VALUE $noreg, $noreg, [[HIGH]]
+; CHECK: DBG_VALUE $noreg, $noreg, [[HIGH]]
+
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It's strange that the DBG_VALUE MIs here are in reverse order (compared to IR). Perhaps that's worth filing a follow-up bug about?
================
Comment at: llvm/test/CodeGen/ARM/debuginfo-split-carryexpr.ll:22
+ call void @llvm.dbg.value(metadata i64 %value, metadata !14, metadata !DIExpression(DW_OP_constu, 32, DW_OP_shra, DW_OP_LLVM_convert, 64, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_stack_value)), !dbg !17
+ call void @llvm.dbg.value(metadata i64 %value, metadata !16, metadata !DIExpression(DW_OP_LLVM_convert, 64, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_stack_value)), !dbg !17
+ ret i64 %value, !dbg !18
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Mind adding coverage for shr/shl?
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D70248/new/
https://reviews.llvm.org/D70248
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