[PATCH] D70223: [DAGCombine] Split vector load-update-store into single element stores

Qiu Chaofan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 13 23:20:09 PST 2019


qiucf created this revision.
qiucf added reviewers: PowerPC, spatel, andrewrk.
qiucf added a project: LLVM.
Herald added subscribers: llvm-commits, steven.zhang, jsji, kbarton, hiraditya, nemanjai.

Currently, Clang does not generate individual `store`s for update to its elements. For code below:

  typedef float v4sf __attribute__ ((vector_size(16)));
  
  void foo(v4sf *a) {
    (*a)[0] = 1;
    (*a)[3] = 2;
  }

LLVM generates a shuffle instr for it, even if there's only one element updated. But GCC will generate individual stores (at least on PowerPC).

Also, if we have a chain of `shufflevector`/`insertelement` instrs, we can go through it, track status of each element and find which updated, finally replace original vector store into multiple element stores. This patch will do it.

This optimization happens at `DAGCombiner`, since each platform can easily set rules about turning it own in own version of hook method. Steps of the optimization are:

1. Start at a vector store, go up through its value operand, until we find a load.
2. In path from store to the load, we only accept insert/shuffle as operands.
3. Track value modification from the load the store. Quit if we need to extract from other vectors.
4. Generate store of elements changed in the path, to replace original vector store.

A target-related method `isCheapToSplitStore` is created. So only PowerPC platform turns the optimization on now.

Discussion: http://lists.llvm.org/pipermail/llvm-dev/2019-September/135432.html http://lists.llvm.org/pipermail/llvm-dev/2019-October/135638.html


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D70223

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/test/CodeGen/PowerPC/swaps-le-5.ll
  llvm/test/CodeGen/PowerPC/swaps-le-6.ll

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