[PATCH] D69891: [VP,Integer,#1] Vector-predicated integer intrinsics

Wed Nov 13 02:13:53 PST 2019

samparker added inline comments.

================
Comment at: llvm/lib/IR/IntrinsicInst.cpp:216
+
+bool VPIntrinsic::canIgnoreVectorLengthParam() const {
+  auto StaticVL = getStaticVectorLength();
----------------
simoll wrote:
> samparker wrote:
> > Are you flexible on this..? For Arm's MVE, it would be useful for us to be able to use a vector length even though we have a fixed vector width. We are trying to use the vectorizers tail folding ability and it could be really nice to use the vector length instead of performing a vector icmp for active lanes. This could free up the 'mask' for other conditions within the loop without having to compare conditions (which will be expensive for us).
> Flexible in what sense? The vector length param should work with scalable types already.
> 
> To clarify: this returns whether the vector length value for this instance of the intrinsic does not have a masking effect on the lanes. This happens when the vector length parameter is a constant that is larger than the length of the vector type (or if the MSB is set). I'll hoist the test in l225 to l240 up so you can "turn off" the vector length param also for SVE/MVE ( by passing `i32 -1` as the vlen).
Ah, sorry, I had missed this was for constant lengths!

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