[PATCH] D29014: [SelDag] Implement FREEZE node

[Juneyoung Lee via Phabricator via llvm-commits]

aqjune added a comment.

I added FREEZE pseudoinstruction to MachineIR, as it seemed to be the succinct way to make it correct.
I made ExpandPostRAPseudos expand the FREEZE to register-copy assembly instruction. ExpandPostRAPseudos pass is done after register allocation (which, or at least a pass relevant to it, seems to replace uses of IMPLICIT_DEF with different registers) as well as ProcessImplicitDef (which is the culprit of the incorrect PHI optimization example) and PHIElimination. I left a commit that explicitly states that IMPLICIT_DEF cannot be used in an undef-y way after the pass.


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  https://reviews.llvm.org/D29014/new/

https://reviews.llvm.org/D29014