[PATCH] D68757: [X86] Add strict fp support for instructions fadd/fsub/fmul/fdiv

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:746
+                   MVT::f64, MVT::v2f64, MVT::v4f64, MVT::v8f64 }) {
+    setOperationAction(ISD::STRICT_FADD, VT, Legal);
+    setOperationAction(ISD::STRICT_FSUB, VT, Legal);
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If SSE isn't enabled, isn't this broken for f32. Similar for SSE2 and f64?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68757/new/

https://reviews.llvm.org/D68757